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PA

Peter Ateshian

US Navy Naval Postgraduate School Xtrm Designs LLC
CTO
Peter Ateshian, National Security Institute scholarship award Naval Postgraduate School (NPS), DARPA PI and member of TAU BETA PI, Eta Kappa Nu Mu chapter, IEEE and SPIE. NPS PhD student and US Navy Contractor since 2004 and founder of Xtrm Designs LLC since 1992. UC Berkeley Master of Engineering in EECS and Business administration, BSc UC Berkeley Engineering Science Bioengineering. Peter is a Silicon Valley veteran with a Career as a VLSI mixed signal SoC designer for Intel, AMD, Apple, Oracle, MindSpeed/Conexant, ATARI Corp,EG &G Reticon, Plantronics and Mentor Graphics Corp via Silicon Design labs/Silicon Compiler Systems. Peter has Consulting engagements with Riscure NA, Renesas, TeraSystems, Exemplar Logic and SocialEars.